ODETTE page at OFFIS
Presentation of the design flow proposed by the ODETTE project
One of the first results of the ODETTE project activity was the specification
of the architecture of the tools used in the proposed design flow and their
interplay.
The figure below gives an overview about the interplay between different
tools developed and introduced during the project.
Fig.1: General Tool Architecture
The SystemC(TM) Front-end translates a hardware-model
written in OSSS description into a language independent intermediate format,
which contains hardware information as well as explicit object-oriented
constructs.
This intermediate representation is used as an input to the ODETTE Synthesiser.
The SystemC(TM) Front-end is actually extension of the SystemC(TM) Analyser (part of the Synopsys' CoCentric® System Studio), which accepts object-oriented constructs. SystemC(TM) Front-end accepts OSSS as input description.
The ODETTE Synthesiser translates the code in the intermediate format generated by the SystemC(TM) Analyser into non object-oriented description - SystemC(TM) or VHDL. Generated SystemC(TM) code contains only constructs, which are directly synthesizable.
Generated SystemC(TM) description can be further processed by existing synthesis tools like the CoCentric® SystemC(TM) Compiler which doesn't allow object-oriented elements as input constructs or simulated by existing tools.
Generating VHDL description can be further processed by Behavioral Compiler®.
VHDL/SystemC(TM) Cosimulation tool is a
member of the Synopsys' SystemC(TM) Design and Verification tool suite named
CoCentric® System Studio.
CoCentric® System Studio enables C/C++/SystemC(TM) simulation and VHDL/SystemC(TM)
co-simulation at different abstraction level and at various design phases.
Using VHDL/SystemC(TM) Cosimulation tool, it is possible to:
- verify an HDL netlist after synthesis with the original SystemC(TM) testbench
- import HDL IP into a SystemC(TM) description
- export SystemC(TM) IP into an HDL environment
As the tools performing back-end synthesis two possibilities are considered.
- The Synopsys Design Compiler® and the Synopsys Behavioral Compiler®
In this case generated VHDL description can be used.
- The CoCentric® SystemC(TM) Compiler - as the new, innovative back-end
synthesis tool.
In this case generated SystemC(TM) can be used.
Fig.2: Application of the ODETTE synthesis tool in
the Synopsys synthesis tool environment