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Deliverables

 

The ODETTE project began in June 2000 and finished in July 2003. All the work in the project is done and all the objectives have been met.

The SystemC(TM)-based object-oriented hardware description methodology has been developed and the SystemC(TM)/C++ language subset (OSSS) has been defined.

With regard to hardware synthesis, OSSS of course specifies some restrictions on the use of C++, but the benefits of the object oriented approach make this up. Classes and objects can be used as well as the related concepts inheritance, templates, polymorphism and even a high level inter-process communication based on a special kind of shared objects (global objects).

Together with the object-oriented hardware description language and design methodology, the ODETTE synthesis tool has been developed. Synthesis means here high level synthesis on top of existing tools like the CoCentric® SystemC(TM) Compiler or Design Compiler®, which is still necessary to perform behavioural and logic synthesis. The promising and flexible software architecture of the tool allows to make fast implementation progress. Currently, the ODETTE Synthesizer is in advanced prototype state and it supports all object-oriented features for synthesis targeted in the ODETTE project work-plan. However, the functionality and features of the ODETTE Synthesizer is further being improved by OFFIS.

The SystemC(TM) front-end necessary for parsing and analysing a OSSS description a C++/SystemC(TM) front-end and a VHDL/SystemC(TM) co-simulation solution has been developed and integrated with a commercially avaiable products.

Another major project result was the development of the new verification technology that takes advantages of object-orientation in hardware description. The verification methodology has been implemented as High-Level Verification Environment.

The actual tool set supports the complete flow from a OSSS description to a SystemC(TM) or VHDL description, including modelling, simulation, verification and synthesis.

Also the supporting libraries with general and telecom elements for modelling hardware with OSSS have been developed.

The evaluation of the project design methodology and tool environment has been perfomed by the project industrial partners.

 


 

List of main deliverables reflecting the project results

 Workpackage

 Deliverable name

 WP1

 Design flow and tool architecture specification
 Generic class library
 Application specific class library
 Verification environment
 Verification environment user's guide
 Design methodology guidelines
 Verification methodology guidelines

 WP2

 SystemC(TM)/C++ front-end tool
 VHDL/SystemC(TM) co-simulator

 WP3

 Synthesis language subset specification
 Synthesiser prototype
 Synthesis guidelines for synthesis tool

 WP4

 Evaluation report of methodology and tools
 Conclusions from high level modelling experiments

 

 

Design flow and tool architecture specification

Specification of the design flow proposed in the ODETTE project and description of the architecture of the tools, developed during the project together with their interplay.
Documentation of this deliverable contains also a comparison of ODETTE design flow with the current common design flows.

More about proposed design flow

Tool architecture overview

 

 


Generic class library

The implementation of the Generic Class Library developed in ODETTE. The library contains general-purpose components, modelled in OSSS description, which can be used in hardware modelling and synthesis.
The final documentation includes User's Guides for the library. The User's Guide provides a detailed description and the usage guidelines for the library and its elements.

More about the Generic Class Library

Generic Class Library

Generic Class Library User's Guide

 

 


Application specific library

The implementation of the Telecom Class Library developed in ODETTE. The library contains elements that are often useful in the telecom domain, covering different types of telecom applications (i.e. for mobile and fixed networks).
Telecom Class Library User's Guide created for the library users provides a detailed description of the class library and its elements.

More about Application Specific Class Library

 

 


Verification environment

High-level verification environment is additonal SystemC(TM) class library which provides verification techniques specific for object-oriented designs. It implements the verification methodology developed in the ODETTE project.
It is supposed to enhance the SystemC(TM) Verification Library by additional features enabling verification of objects and taking advantage of object-oriented design methodology.

More about Verification Environment

 

 


Verification environment user's guide

To facilitate usage of the verification environment the Verification Environment User's Guide has been created, which:

  • describes the functionality of the ODETTE Verification Environment
  • give useful hint how to install and start workin with the verification environment
  • describes the general structure of the verification environment
  • provides user with a detailed usage guidelines
  • ODETTE Verification Environment User's Guide

     

     


    Design methodology guidelines

    This document provides the final assessment of the ODETTE design methodology, including guidelines for system modeling and the definition of a few design scenarios with the description of the toolset supporting the design flow. It provides also detailed description and analysis of the ODETTE design methodology and design flow that implements it.
    The authors summarize the advantages of ODETTE approaches and formalize a set of HW modeling methodology guidelines. Also a few design scenarios and simple modelling examples are presented.

     

     


    Verification methodology guidelines

    This document describes in details the Odette Verification Methodology that was developed to address the verification needs of the SystemC(TM) Plus Design Methodology.
    The goal of this verification methodology is to propose methods in which to improve the functional verification of object-oriented designs and to provide solutions and aids for functional verification of these designs.
    In the document there has been defined a simple but useful concept of high-level local events, which are events that are associated with design objects and limited to a single object. The developed verification methodology proposes methods in which objects can use the high-level local events to assist in their own verification, and specifies how these events can be used by external verification tools.

    High-Level Verification Methodology Guidelines

     

     


    SystemC(TM)/C++ front-end tool

    Implementation of SystemC(TM) front-end tool which is able to process OSSS description. The front-end tool is necesarry for parsing and analysing SystemC(TM)/C++ input description. It transforms input description into intermediate format which can be further processed by other tools like ODETTE Synthesizer.

     

     


    VHDL/SystemC(TM) co-simulator

    The VHDL/SystemC(TM) co-simulation environment developed within the project that allows for co-simulation of a mixed VHDL and SystemC(TM) designs.
    It enables to use the existing IPs developed in VHDL in the SystemC(TM) designs as well as using a SystemC(TM) modules in the VHDL designs.

    More about the Cosimulation tool

     

     


    Synthesis language subset specification

    The C++/SystemC(TM) language subset specification (Language Reference Manual) that defines the input language subset for the ODETTE synthesis tool. The developed language subset has been called OSSS (i.e. ODETTE System Synthesis Subset). Using ODETTE synthesis tool, which is capable to process object-oriented SystemC(TM) constructs (OSSS description), hardware can be directly synthesised from object-oriented descriptions.

    OSSS can be regarded as superset of synthesisable SystemC(TM) subset (which is supported by available SystemC(TM) synthesis tools) and additionally it includes constructs and features which are specific to object-oriented designs (e.g. classes, objects, inheritance, method-based communication, class templates, polymorphism, etc) and other constructs (module templates, fixed-point types, Global Objects, etc).

    The OSSS Language Reference Manual focuses on the description of a OSSS (synthesisable subset of C++/SystemC(TM)).
    There are also some comparisons between object-oriented SystemC(TM) and VHDL in order to illustrate basic principals of hardware design by means of a well established hardware description language and to allow hardware designers familiar with VHDL an easy entry to object-oriented modelling in SystemC(TM)

    More about OSSS

    Language Reference Manual

     

     


    Synthesiser prototype

    This is a final prototype of the synthesis tool developed in the framework of the ODETTE project.
    The synthesiser provides the functionality to translate an object-oriented hardware model described in the OSSS description into a behavioural SystemC(TM) or VHDL equivalent model without object-oriented constructs. The final prototype supports the OSSS description defined in the Language Reference Manual created in the ODETTE.

    More about the ODETTE Synthesiser

     

     


    User guidelines for synthesis tool

    This document, besides the usage guidelines, comprises also the information of the different kinds of problems that may occur during synthesis, and gives suggestions how to prevent them.
    The document contains:

  • Installation notes
  • Usage guidelines
  • Command reference
  • Hints and guidelines how to avoid synthesis problems
  • User's Guide for the ODETTE Synthesiser

     

     


    Evaluation report of methodology and tools

    This project deliverable summarizes the evaluation of the ODETTE tool suite and the methodology that implements the integration of the ODETTE toolset in the current design practice. The evaluation process, which was a base for this report, has been carried on by Bosch and Siemens MC. This covers also the overview of the modelling examples, which were used in the evaluation of the methodology and tools developed in the ODETTE project.

     

     


    Conclusions from high level modelling experiments

    The evaluation in this report is mainly based on the high-level modeling experiments made by IBM. It goals are to describe the current state of the tools and methodology from the point of view of IBM and to identify areas for improvement.
    The ODETTE results that are discussed in the report are:

  • verification environment
  • SystemC Plus design methodology, the SystemC synthesizable subset and OOHWLIB
  • ODETTE synthesizer
  • generic class library
  •