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MONDAY |
TUESDAY |
WEDNESDAY |
THURSDAY |
FRIDAY |
SATURDAY |
| |
click |
HDL & VUFE click |
HDL & VUFE click |
VCDR click |
VCDR click |
SSDL click |
SSDL click |
|
| 7h30 |
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Registration
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|
| 8h |
Registration |
Registration |
Registration |
WG Meeting |
| 8h30 |
| 9h |
OPENING |
Invited Paper |
|
S 2.3
Standardization
of VCs |
|
Keynote Speaker |
| 9h30 |
Keynote Speaker |
S 1.4
Design Experiences |
| 10h |
S 3.4
Invited papers |
| 10h30 |
Poster session |
Poster session |
| 10h45 |
Break |
| 11h |
Registration |
S 1.1
Synthesis
methodology |
Break |
| 11h15 |
Panel Languages & semantics |
| 11h30 |
S 1.5
Mixed Technol.
& Mixed Sign. |
Panel IP reuse for SDL |
| 12h |
Poster session |
| 12h30 |
Poster session |
Lunch |
| 13h |
Tutorials |
Lunch |
Lunch |
Lunch |
|
| 13h30 |
S 3.5
Formal Specifications |
| 14h |
S 1.2
Simulation
et Estimation Tools |
VCDR Keynote Speaker |
S 2.4
IP Measurements
& Quality |
S 3.1
SDL |
| 14h15 |
Poster session |
| 14h30 |
| 15h |
Poster session |
HDL Late contributions |
S 2.1
Prototyping
for Re-Use |
Break |
S 3.6
SLDL
Meeting Session |
| 15h15 |
S 2.5
IP
Modeling & Libraries |
S 3.2
Synchronous
Languages |
| 15h30 |
Break |
| 16h |
Tutorials |
S 1.3
Formal Verification |
Poster session |
| 16h15 |
Poster session |
| 16h30 |
CLOSING |
| 17h |
Break |
Break |
S 2.2
Application
& Retrieval |
SLDL Committee & WG meeting |
| 17h15 |
HDL Standards Panel |
S 2.6
Invited papers |
S 3.3
Invited papers |
| 17h30 |
| 18h |
Break |
| 18h30 |
Break |
Fringe meetings |
Break |
| 19h |
Reception at Lyon City Hall |
FDL -PC Meeting |
| 19h30 |
FDL Party |
| 20h |
| 20h30 |
| 21h |