W e l c o m e FDL is the European forum to exchange experiences and learn about new trends in the application of languages and models for the specification and modeling of electronic or heterogeneous systems. Methods for modeling and specification push the development of new methodologies for design and verification especially at system level. The aim of FDL is to offer several co-located events, and to give an opportunity to gain up-to-date knowledge across these topics. FDL’03 is the sixth in a series after Lausanne, Lyon, Tübingen, ENS Lyon, and ESIM Marseille. This year, the historically renowned Casino of the J. W. Goethe-University in Frankfurt, Germany has been chosen to host FDL’03. The Casino is located in a park in the city of Frankfurt, and is an excellent place for such an event. FDL Sponsors: FDL’03 is organized around four interrelated workshops. Together with special sessions on ‘hot topics’, tutorials, panels, and technical discussions within standardization and user group meetings the forum has a broad spectrum of opportunities to learn, discuss and promote actual and new languages and associated methods. The four workshops address actual key aspects of languages and models for system design: CSD: C-Based System Design, presents and discusses C/C++ based, system design methods and tools. Topics include hardware and software synthesis, RTOS aspects, simulation, as well as performance evaluation and analysis. Roadmaps for the future development of existing approaches will be presented and discussed. AMS: Analog, Mixed-Signal and Mixed-Technology Design, aims at exploring new design approaches for specification, modelling, simulation, synthesis and reuse based on emerging design languages such as, but not limited to, SystemC-AMS, VHDL-AMS or Verilog-AMS. UML: UML Based System Specification & Design, aims at UML-based design methods from specification to (automatic) synthesis. Starting from platform independent modelling, they enable mapping on platform specific elements, using classical or novel synthesis techniques, techniques for performance analysis, validation and verification starting from UML. LFM: Languages for Formal Methods, mainly aims at the investigation of various means for formal verification, their application and corresponding methods in the domain of electronic design automation. Means cover the wide spectrum of graphical and textual languages for specification of systems and their properties. The additional special sessions give a deeper insight into the topics ‘Models and Methods for Automotive Software Engineering’, ‘Hardware Description and Verification Languages’ with focus on SystemVerilog, and ‘Specification and Modelling for Analog Circuit Synthesis’. This year, a very high number of good submissions, and attractive proposals allowed us to fully accomplish the goals of FDL. We encourage you not to miss this unique opportunity to learn, discuss, and contribute to the latest research activities and evolution of system specification languages. Christoph Grimm FDL’03 General Chair